RISC-V System-on-Chip Design

RISC-V System-On-Chip Design fits at the nexus of computer architecture, microarchitecture, and chip design. It is written to be accessible to an advanced undergraduate audience with limited background. It explains concepts from operating systems, VLSI, and memory systems as necessary, and high school mathematics is sufficient preparation for most of the book, although the floating point and division chapters will be primarily of interest to those with a curiosity about computer arithmetic. Like Harris and Harris's Digital Design and Computer Architecture textbooks, this book will appeal to students with easy-to-read and complete explanations, sidebars, and occasional humor and cartoons.It comes with an open-source implementation and will include end-of-chapter problems to extend the RISC-V processor in various ways. Ancillary materials include a GitHub repository with complete open-source SystemVerilog code, validation code in C and assembly language, and code for benchmarking and booting Linux.Ancillary materials include a GitHub repository with complete open-source SystemVerilog code for the fully-functional Wally RISC-V SoC, validation code in C and assembly language, code for benchmarking and booting Linux, labs, slides, exercises, and figures.Please note that chapters 20-23 and Appendices A-D and F are not included in the print book but are available on the Companion Site athttps://shop.elsevier.com/books/book-companion/9780323994989. These chapters and appendices are also in the electronic version of the book.Supplementary resources for the book are also available on a website hosted by the authors at: ddcabook.com.
- Includes a concrete application & implementation of the open RISC-V architecture - Explores rarely taught microarchitectural issues: - Pipelines, buses, caches, branch prediction, virtual memory, floating-point, cryptography & peripherals
- Illustrates system design with CORE-V Wally, a fully functional RISC-V system-on-chip: - Programming & debugging RISC-V in C & assembly - SystemVerilog design, debug, verification & synthesis - Benchmarking - Booting Linux on a simulator & FPGA
- Provides complete open-source code: github.com/openhwgroup/cvw

David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons.

PrefaceHow to Use This BookAcknowledgementsAbout the AuthorsForeword01. A Brief History of Computer Design 02. Introduction to RISC-V03. RISC-V Software Tool Flow 04. HDL Design Practices 05. Design Verification 06. Logic Synthesis 07. Pipelined Core 08. Privileged Operations 09. Bus Interface 10. Caches 11. Memory Management Unit 12. Load/Store Unit 13. Instruction Fetch Unit 14. Extensions: C (Compressed) 15. Extensions: M (Multiply and Divide) 16. Extensions: F/D/Q/Zfh/Zfa (Floating-Point) 17. Extensions: A (Atomic) 18. Extensions: Zb* and Zk* (Bit Manipulation and Cryptography)19. Other Extensions 20. Peripherals 21. Benchmarking 22. Linux 23. FPGA Implementation Appendix A Wally SynopsisAppendix B Hitchhiker's Guide to Linux Appendix C Version Control using Git Appendix D Tcl Book of Armaments Appendix E Floating-Point ImplementationBibliographyIndex